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unencyclopedic, find a way to incorporate it into the lede/article naturally rather than this note |
unencyclopedic, find a way to incorporate it into the lede/article naturally rather than this note |
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Particular practical examples include [[Bit banging]] of [[GPIO]] using a low-cost [[Embedded controller]] such as the [[WDC 65C02]], [[8051]] and [[PIC instruction listings#Baseline core devices (12-bit)|Atmel PIC]]. At the slow clock rate of these CPUs, if bit-set/clear/test bit manipulation were not available the use of that low-cost CPU would, self-evidently, not be viable for the target application.
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In something of a Wikipedia [[Fourth wall]] breakage note: [[GPUs]] and other highly-specialist tasks such as cryptography tend to result in extreme-specialist instructions, wthout which performance would suck. Examples include [[AES instruction set]] extensions that cannot in any way be used for any other purpose. GPUs such as Larrabee<ref>{{cite web | title=TomF's talks and papers | url=https://tomforsyth1000.github.io/papers/papers.html }}</ref> and [[Single instruction, multiple threads#Nyuzi GPGPU|Nyuzi]] attempted to "dial back" this practice to some extent, only to discover why it is done (performance sucks otherwise... seeing a trend, here?).
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If you encounter any type of ''unusual or important'' bit manipulation instructions, or any CPU that has them, feel free to add them below, bearing in mind that the page's primary purpose is Categorisation, not explicit functional description per se. A helpful task for future readers would be to add such pages describing the functionality to the "See also" section. Enjoy the end of the Fourth Wall...
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== Hardware bit manipulation ==
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