AVR microcontrollers: Difference between revisions

Revision as of 13:44, 12 April 2005

Revision as of 18:39, 21 May 2005

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The acronym '''AVR''' has been reported/rumoured to stand for '''''A'''dvanced '''V'''irtual '''R'''ISC'' and/or the initials of the two company founders—'''A'''lf Egil Bogen and '''V'''egard Wollan—who for their part have chosen to let the matter rest unresolved, giving mostly shadowy answers when asked directly.

Even though the AVR instruction set is relatively regular, it is not orthogonal:

* [[Pointer register]]s X, Y, and Z have addressing capabilities that are different from each other.

* [[Register file]] locations 0...15 have different addressing capabilities than register file locations 16...31.

* IO locations 0 to 31 have different addressing capabilities than IO locations 32 to 63.

* CLR affects flags, while SER does not, even though they seem to be complementary intructions (set all bits to 0 and respectively to 1).

* opcodes 0x95C8 and 0x9004 do exactly the same thing (LPM).

== External links ==