Content deleted Content added
m futures -> features |
m Disambiguated "networking" |
||
Line 3:
* integrated low-[[Latency (engineering)|latency]] [[memory controller]],
* hardware [[accelerator (computing)|acceleration]] features for [[packet]] handling.
MPUs have emerged since 2000 as a new class of processor used for [[Embedded system|embedded]] applications in [[telecommunications]], [[computer network|networking]] and other applications.
Somewhat confusingly, if the processor is used for general-purpose computing,
rather than embedded or special-purpose applications, it is termed
|