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'''ATPG''', or(acronym for both '''A'''Automaticutomatic test'''T'''est pattern'''P'''attern generation'''G'''eneration and '''A'''utomatic '''T'''est '''P'''attern '''G'''enerator''') is an [[electronic design automation]] toolmethod/technology used to find an input (or test) sequence that, when applied to a [[digital circuit]], enables testers to distinguish between the correct circuit behavior and the faulty circuit behavior caused by a particular faultdefects. The patterns generated patterns are used to test semiconductor devices after manufacture, and perhapsin attemptsome cases to determineassist with determining the cause of failure ([[failure analysis]].<ref>{{cite conference| last=Crowell| first=G| coauthors=Press, R.| title=Using Scan Based Techniques for Fault Isolation in Logic Devices| booktitle=Microelectronics Failure Analysis | pages= pp. 132-8}}</ref>) The effectiveness of ATPG is measured by the faultamount coverageof achievedmodeled fordefects, theor [[fault model]s], detected and the number of generated vectors,patterns. whichThese shouldmetrics begenerally directlyindicate proportional[[test toquality]] (higher with more fault detections) and test application time (higher with more patterns). ATPG efficiency is another important consideration. It is influenced by the fault model under consideration, the type of circuit under test ([[Scan chain|full scan]], synchronous sequential, or asynchronous sequential), the level of abstraction used to represent the circuit under test (gate, register-transistor, switch), and the required [[Fault coverage|test quality]].
== Basics of ATPG ==
A defect is an error introduced into a device during the manufacturing process. A fault model is a hypothesismathematical description of how thea circuitdefect mayalters go wrong in the manufacturingdesign processbehavior. A fault is said to be ''detected'' by a test pattern if, when applying the pattern to the circuitdesign, differentany logic values can bevalue observed, in at least one or more of the circuit's primary outputs, differs between the original circuitdesign and the faultydesign circuitwith the fault. The ATPG process for a given targettargeted fault consists of two phases: ''Fault activation'' and ''Fault propagation''. Fault activation establishes a signal value at the fault model site that is opposite thatof the value produced by the fault model. Fault propagation propagatesmoves the resulting signal value, or fault effect, forward by sensitizing a path from the fault site to a primary output.
ATPG can fail to find a test for a particular fault in at least two cases. First, the fault may be intrinsically undetectable, sosuch that no vectorspatterns exist that can detect that particular fault. The classic example of this is a redundant circuit, designed so that no single fault causes the output to change. In such a circuit, any single fault will be inherently undetectable.
Second, it is possible that a vectorpattern(s) exist, but the algorithm cannot find it. Since the ATPG problem is [[NP-complete]] (by reduction from the [[boolean satisfiability problem]]) there will be cases where vectorspatterns exist, but ATPG gives up since it will take an impossiblyincredibly long time to find them (assuming [[Complexity classes P and NP|P≠NP]], of course).
== The Stuck-at fault model ==
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