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Line 45: Depending on the target part, the BDM controller may feature a hardware [[breakpoint]] register. The register holds a value indicating an [[memory address\|address]] in memory. When the target part's CPU accesses that ___location in memory, the BDM hardware can take control of the target part, stop program execution, and begin operating in Background Mode. == ~~Bibliography~~References == * Motorola (Freescale Semiconductor Inc.). CPU12 Reference Manual (CPU12RM/AD). * Freescale Semiconductor Inc. MC9RS08KA2 Data Sheet (MC9RS08KA2, Rev. 1.0). * Freescale Semiconductor Inc. RS08 Core Reference Manual (RS08RM, Rev. 1.0).

Background debug mode interface: Difference between revisions