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Convex was formed in [[1982]] by Bob Paluck and Steve Wallach in [[Richardson, Texas]]. Their product concept was not particularly original: they planned on producing a machine very similar in architecture to the [[Cray Research]] vector processor machines, but with a somewhat lower performance, and at a much lower price-performance point. In order to lower costs, the Convex designs were not as technologically aggressive as Cray's, and were based on more mainstream chip technology, attempting to make up for the loss in performance in other ways.
Their first machine was the '''C1''', released in 1985. The C1 was very similar to the [[Cray-1]] in general design, but used a slower memory and main CPU. They offset this by increasing the capabilities of the vector units, including 128 64-bit registers, double that of the Cray. It was based on [[CMOS]] chips, and generally rated at 20 MFLOPS peak for double precision (64 bits),
The '''C2''' was a crossbar-interconnected [[multiprocessor]] version of the C1, with up to 4 CPUs, released in 1988. It used newer [[ECL]] chips for a small boost in speed, rated at 50 MFLOPS peak per CPU. This was followed by the '''C3''' in 1991, essentially similar to the C2 but with a faster clock and support for up to 8 CPUs. Various configurations of the C3 were offered, with between 50 to 240 MFLOPS per CPU. Another speed boost was planned for the '''C4''', which moved the hardware implementation to [[GaAs]]-based chips (following an evolution identical to that of the Cray machines), but the effort was scrapped.
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