Multi-channel memory architecture: Difference between revisions

Revision as of 05:23, 21 July 2005

Revision as of 20:55, 2 August 2005

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''Dual -channel architecture'' [[DDR_SDRAM|DDR SDRAM]] isdescribes a [[motherboard]] technology usedthat toeffectively increasedoubles memorydata performance,throughput byin usingthe twosystem channelsbus tofrom loadRAM datato into memory. Thethe [[Northbridge (computing)|memory controller]]. utilizesDDR-enabled memory controllers utilize two 64 -bit data channels, resulting in a total bandwidth of 128 bits, effectivelyto doublingmove thedata bandwidthfrom RAM to memorythe CPU.

In order to achieve this, the [[DDR_SDRAM|DDR SDRAM]] memory modules must be installed into matching memory slots, which are usually color coded on the [[motherboard]]. Each memory module in each slot must be identical to the one in its matching slot.

==Reason For Being==

[[Image:ram_bottleneck.gif|frame|Graphic illustrating bottleneck between CPU, RAM, and other peripherals]]

Dual channel technology was created to address the issue of bottlenecks. Increased processor speed and performance requires other, less prominent components to keep pace.

In order to achieve this, the [[DDR_SDRAM|DDR SDRAM]] memory modules must be installed into matching memory slots, which are usually color coded on the [[motherboard]]. Each memory module in each slot must be identical to the one in its matching slot.

==Reason For Being==