Property Specification Language: Difference between revisions

Revision as of 07:38, 7 April 2005

Revision as of 23:48, 16 September 2005

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'''Property Specification Language''' is a language [[standard]]ized by [[Accellera]] for specifying [[propertyProperty (philosophy)|properties]] or [[assertion (computing)|assertions]] about [[hardware]] designs. It comes in two flavors, one for [[VHDL]] and one for [[Verilog]].

More information is available at