Logic simulation: Difference between revisions

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== Levels of abstraction ==
 
it'''It is a very good article for Mr. NavvabiNavabi students to write CA0.'''
 
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Image:http://www.ece.neu.edu/research/navabi/Navabi2.jpg|Mr. Navabi
it is a very good article for Mr. Navvabi students to write CA0.
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Because simulation is a general technique, a hardware design can be simulated at a variety of levels of abstraction. Often it is useful to simulate a model at several levels of abstraction in the same simulation run. The commonly used levels of abstraction are [[digital circuit|gate level]], [[register transfer level]] (RTL), and behavioral (or algorithmic) level. However, it is possible to incorporate lower levels like [[SPICE|transistor level]] or even lower physical levels as well as higher levels such as transaction levels or ___domain-specific levels.