Flow to HDL: Difference between revisions

Revision as of 05:23, 16 February 2009

Revision as of 14:12, 16 February 2009

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'''Flow to HDL''' tools and methods convert flow-based system design into a [[hardware description language]] (HDL) such as [[VHDL]] or [[Verilog]]. Typically this is a method of creating designs for [[field-programmable gate array]], [[application-specific integrated circuit]] prototyping and [[DSP]]{{clarifymeClarify me|date=16 February 2009}} design. Flow-based system design is well-suited to field-programmable gate array design as it is easier to specify the innate parallelism of the architecture.

== History==

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== Applications ==

Most applications are ones which take too long with existing supercomputer architectures. These include bioinfomatics, CFD,{{clarifymeClarify me|date=16 February 2009}} financial processing and oil and gas survey data analysis. Embedded applications that require high performance or real-time data processing are also an area of use. [[System-on-a-chip]] design can also be done using this flow.

== Examples ==