System bus model: Difference between revisions

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Revision as of 11:29, 20 February 2009

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{{Orphan|date=February 2009}}

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The '''system bus model''' is a streamlined version of the [[Von Neumann architecture|Von Neumann model]] of computer architecture. The system bus models divides the computer into three individual subunits which are the CPU, memory and input/output. The system bus model deviates from the von Neumann model by combining the [[arithmetic logic unit]] (ALU) and the [[central processing unit]] (CPU) into a single unit.<ref name="POCA">{{cite book|first=Miles J.|last=Murdocca| coauthors=Vincent P. Heuring|year=2000|title=Principles of Computer Architecture|publisher=Prentice-Hall|id=ISBN 0-201-43664-7|pages=5}}</ref>