Memory hierarchy: Difference between revisions

Content deleted Content added
ballpark figures for latency and size of storage levels
m "dozens of bytes" too small for a machine with e.g. 32x32bit regs + renaming etc.
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The memory hierarchy in most computers is as follows:
 
* [[CPU register]]s (fastest possible access, only dozenshundreds of bytes at most)
* [[Level 1 cache]] (often accessed in just a few cycles, usually tens of kilobytes)
* [[Level 2 cache]] (higher latency than L1 by 2x-10x, often 512KB or more)