A Block diagram Language: Difference between revisions

Revision as of 22:34, 12 April 2009

Revision as of 09:44, 15 April 2009

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'''A Block diagram Language (ABL)''' is the graphic companion language of the textual [[hardware description language]] [[KARL]], which supports [[Structured hardware design]]. It has been authored by [[Reiner Hartenstein]] and jointly implemented by the [[Xputer]] Lab at [[TU Kaiserslautern]] and Guglielmo Girardi at [[CSELT]], Torino,Italy, as the ABLED interactive graphic hardware design editor with automatic interconnect compatibility check. The [[Domino notation]] of ABL is based on structured wiring function primitives and topological notations of [[KARL]] and allows interactive interconnect synthesis by module block abutment. A couple of other design tools are based on these calculus-like notations, like ARIANNA (interactive chip floor plan generator, and GENMON from [[CSELT]]), the BACH compiler, an [[ASIC]] Data path module generator, and others.

=== Literature ===

*G. Girardi, R. Hartenstein, U. Welters: ABLED: a RT level Schematic Editor and Simulator user Interface; Int`l EUROMICRO Symp.; Brussels, Belgium, 1985.

*G. Girardi, R. Hartenstein, U. Welters: KARL (textual) and ABL (graphic) : A User/Designer interface in microelectronics; in (Editor: J. Encarnaçao): CAD-Schnittstellen und Datentransfer-Formate im Elektronik-Bereich; Springer-Verlag, 1986.

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*R. Hartenstein: The History of KARL and ABL; in: J. Mermet (editor): Fundamentals and Standards in Hardware Description Languages; Kluwer Academic Publishers, September 1993

=== LinksExternal links ===

* [http://xputers.informatik.uni-kl.de/karl/karl_history_fbi.html The History of KARL and ABL]