Talk:Automatic test pattern generation: Difference between revisions

Revision as of 14:48, 24 April 2009

Revision as of 14:52, 24 April 2009

Line 47:

:: Can someone reword this:

"any logic value observed at one or more of the circuit's primary outputs differs between the original design and the design with the fault. "

what does "differs between" mean? (I am native speaker btw!)

what does "differs between" mean? (I am native speaker btw!)

I thought the fault officially exists when the output matches the contrived faulty model?

i.e.: if it doesn't match the faulty model, then it's not officially a fault (except maybe the test is faulty!) <span style="font-size: smaller;" class="autosigned">—Preceding [[Wikipedia:Signatures|unsigned]] comment added by [[Special:Contributions/87.113.116.33|87.113.116.33]] ([[User talk:87.113.116.33|talk]]) 14:47, 24 April 2009 (UTC)</span><!-- Template:UnsignedIP --> <!--Autosigned by SineBot-->

this bit looks like wonky english as well:

"Fault activation establishes a signal value at the fault model site that is opposite of the value produced by the fault model"

Fault sensitisation means you might use Boundary Scan JTAG to set permanent inputs as a test pattern, and pass them through, doesn't it? Then you know what the output is supposed to be if it's faulty or if it's "no fault detected" (as opposed to "unfaulty"... 'cos you're never guaranteed are you?!)