|
<ref> Electronic Design Automation For Integrated Circuits Handbook, by Lavagno, Martin, and Scheffer, ISBN 0-8493-3096-3, a survey of the field of EDA. The above summary was derived, with permission, from Volume I, Chapter 16, Digital Simulation, by John Sanguinetti.
</ref>
== Logic Simulation Programs ==
Some well known applications used to simulate digital logic are [[Verilog]] (Technically '''Verilog''' is an HDL or [[Hardware Description Language]]), '''Logic Sim''' and [[Logisim]]. The most famous of which is Verilog, some variations of Verliog are Veriwell, and [[Icarus Verilog]].
== References ==
<references />
== See also==
* [[LogicCircuit]]
== Further readingReferences ==
{{reflist}}
{{external links}}
{{cleanup-spam|section}}
== Free logic simulators ==
* [http://www.codeplex.com/Simulo Simulo] – Free Digital Logic Simulator
* [http://www.spsu.edu/cs/faculty/bbrown/circuits/howto.html Digital Works] – digital logic simulator (Windows)
* [[CEDAR Logic Simulator]] – digital logic simulator (Windows)
* [http://www.icarus.com/eda/verilog Icarus Verilog] – open-source simulation and synthesis tool for Linux
* [[Logisim]] – digital logic simulator ([[Java]])
* [http://ghdl.free.fr/ ghdl ] – VHDL simulator
* [http://ksimus.berlios.de/ KSimus] – Extendable simulator; can handle digital logic among other types
* [http://kenwatts.blogspot.com/2008/08/digital-logic-simulator-in-silverlight.html Silverlight Digital Logic Simulator] – Silverlight implementation of a digital logic simulator that runs in your web browser.
* [[LogicCircuit]] – digital logic simulator
* [http://www.alanfeldstein.com/products/software/fss/ FSS] – JHDL simulator specifically for SPARC-V9 architectural verification (Java)
[[Category:Electronic circuit verification]]
| 