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The [[D-PHY]]<ref>[https://members.mipi.org/mipi-adopters/file/Specifications/Board%20Approved/MIPI%20D-PHY%20Specification_v00-90-00_final_11152007132023.pdf MIPI D-PHY 0.90 specification],requires an account at the MIPI website</ref> uses differential signaling to convey PHY symbols over micro-stripline wiring. A second differential signal is used to transmit the associated clock signal from the source to the destination. The D-PHY technology thus uses a total of 4 signal wires per direction. Data traffic in the forward and reverse directions are totally independent at this level of the protocol stack.
In UniPro, the D-PHY is used in a mode (called "8b9b" encoding) which conveys 8-bit bytes as 9-bit symbols. The UniPro protocol uses this to represent special control symbols (outside the usual 0 to 255 values). The PHY itself uses this to represent certain special symbols that have meaning to the PHY itself (e.g. IDLE symbols). Note that the ratio 8:9 can cause some confusion when specifying the data rate of the D-PHY: a PHY implementation running with a 450 MHz clock frequency is often rated as a 900 Mbps PHY, while only 800 Mbps is then available for the UniPro stack.
The D-PHY also supports a Low-Power Data Transmission (LPDT) mode and various other low-power modes for use when no data needs to be sent.
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