Template:Infobox CPU architecture/doc: Difference between revisions

Content deleted Content added
Parameters: Don't give widths of registers in gpr= or fpr= if it's implied by the ISA width.
Example: Update to match current state of the SPARC version.
Line 60:
| extensions = [[Visual Instruction Set|VIS]] 1.0, 2.0, 3.0
| open = Yes
| gpr = 31 64(G0 = 0; non-bitglobal registers use ([[register window]]s)
| fpr = 32 64-bit
}}
<pre>
Line 77:
| extensions = [[Visual Instruction Set|VIS]] 1.0, 2.0, 3.0
| open = Yes
| gpr = 31 64(G0 = 0; non-bitglobal registers use ([[register window]]s)
| fpr = 32 64-bit
}}
</pre>