Simple programmable logic device: Difference between revisions

Revision as of 17:37, 16 November 2009

Revision as of 17:38, 16 November 2009

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A '''simple programmable logic device (SPLD)''' is a [[programmable logic device]] with complexity below that of a [[complex programmable logic device (CPLD)]].

== '''''''''== SPLD ==''''''''' ==

The term commonly refers to devices such as [[read-only memory|ROM]]s, [[programmable array logic|PAL]]s, [[programmable logic array|PLA]]s and [[generic array logic|GAL]]s.

[[Category:Computer hardware]]

{{Compu-hardware-stub}}

(Simple PLD)A programmable logic device that provides a small logic block that can be programmed. The logic block typically contains a handful of macrocells, which have multiple inputs and the ability to perform a limited amount of logic. SPLDs use either permanent fuses (fusible link or antifuse) to hold the logic design interconnections or a memory such as EPROM, EEPROM or flash. See PLD, CPLD, PAL and PLA.

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