Inter-processor interrupt: Difference between revisions

Revision as of 04:07, 21 December 2005

Revision as of 14:35, 9 January 2006

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An '''Inter-Processor Interrupt''' ('''IPCIPI''') is a special type of [[interrupt]] by which one processor may interrupt another processor in a [[multiprocessor]] system. IPCs are typically used to implement a [[cache coherency]] [[synchronization]] point.

In [[x86]] base systems, an IPCIPI synchronizes the cache and [[Memory Management Unit]] (MMU) between processors.

== See Also ==