Edge triggered interrupt: Difference between revisions

Revision as of 01:07, 11 January 2006

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In [[computing]], an '''edge-triggered interrupt''' is a class of [[interrupt]]s that are triggered only on the rising edge of the assertion of the [[interrupt request]] line. These types of interrupts can typically only identify the presence of an interrupt request. When another interrupt is generated an edge triggered interrupt will not be able to distinguish it since the line is already asserted. Compare [[level triggered interrupt]].

Multiple devices typically cannot share an edge-triggered interrupt line. Because the generation of another interrupt will go unoticed, devices in such a configuration could go unserviced. The [[Industry Standard Architecture|ISA]] bus in particular is know for this issue. Many ISA cards cannot be probed for interrupt status, and may still will stop responding or lockup the system if service when they did not generate an interrupt. Therefore, special care must be taken to insure such systems do not share interrupt lines.

Compare [[level triggered interrupt]].