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|isbn=9780132133982
|page=489-494
}}</ref> When a single address decoder serves multiple devices, an address decoder with n address input bits can serve up to 2<sup>
Address decoders are fundamental building blocks for systems that use buses. They are represented in all integrated circuit families and processes and in all standard [[FPGA]] and [[ASIC]] libraries. They are discussed in introductory textbooks in digital logic design.<ref name="TAoE"/>
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