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'''ATPG''', or '''Automatic test pattern generation''' is an [[electronic design automation]] tool that attempts to find an input (or test) sequence that, when applied to a [[digital circuit]], enables testers to distinguish between the correct circuit behavior and the faulty circuit behavior caused by a particular fault. The effectiveness of ATPG is measured by the fault coverage achieved for the [[fault model]] and the number of generated vectors, which should be directly proportional to test application time. ATPG efficiency is another important consideration. It is influenced by the fault model under consideration, the type of circuit under test ([[Scan chain|full scan]], synchronous sequential, or asynchronous sequential), the level of abstraction used to represent the circuit under test (gate, register-transistor, switch), and the required [[Fault coverage|test quality]].
== Basics of ATPG ==
A fault model is a hypothesis of how the circuit may go wrong in the manufacturing process. A fault is said to be ''detected'' by a test pattern if, when applying the pattern to the circuit, different logic values can be observed, in at least one of the circuit's primary outputs, between the original circuit and the faulty circuit. ATPG for a given target fault consists of two phases: ''Fault activation'' and ''Fault propagation''. Fault activation establishes a signal value at the fault site opposite that produced by the fault. Fault propagation propagates the fault effect forward by sensitizing a path from the fault site to a primary output.
== The ''Stuck-at'' fault model ==
In the past several decades, the most popular fault model used in practice is the single stuck-at fault model. In this model, one of the signal lines in a circuit is assumed to be stuck at a fixed logic value, regardless of what inputs are supplied to the circuit. Hence, if a circuit has ''n'' signal lines, there are potentially ''2n'' stuck-at faults defined on the circuit, of which some can be viewed as being equivalent to others. The stuck-at fault model is a ''logical'' fault model because no delay information is associated with the fault definition. It is also called a ''permanent'' fault model because the faulty effect is assumed to be permanent, in contrast to ''intermittent'' and ''transient'' faults that can appear randomly through time. The fault model is ''structural'' because it is defined based on a structural gate-level circuit model.
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== Sequential ATPG ==
Sequential-circuit ATPG searches for a sequence of vectors to detect a particular fault through the [[State space|space of all possible vector sequences]]. Various search strategies and heuristics have been devised to find a shorter sequence and/or to find a sequence faster. However, according to reported results, no single strategy/heuristic out-performs others for all applications/circuits. This observation implies that a test generator should include a comprehensive set of heuristics.
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== ATPG and nanometer technologies ==
Historically, ATPG has focused on a set of faults derived from a gate-level fault model. As design trends move toward nanometer technology, new ATPG problems are emerging. During design validation, engineers can no longer ignore the effects of crosstalk and power supply noise on reliability and performance. Current modeling and vector-generation techniques must give way to new techniques that consider timing information during test generation, that are scalable to larger designs, and that can capture extreme design conditions. For nanometer technology, many current design validation problems are becoming manufacturing test problems as well, so new fault-modeling and ATPG techniques will be needed.
== Algorithmic Methods ==
Testing [[very-large-scale integration|very-large-scale integrated]] circuits with a high [[fault coverage]] is a difficult task because of complexity.
Therefore many different ATPG methods have been developed to address [[Combinatorial logic|combinatorial]] and [[Sequential logic|sequential]] circuits.
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*''Electronic Design Automation For Integrated Circuits Handbook'', by Lavagno, Martin, and Scheffer, ISBN 0849330963 A survey of the field, from which the above summary was derived, with permission.
[[Category:Electronic design automation]]▼
[[Category:Digital electronics]]
▲[[Category:Electronic design automation]]
[[Category:Electronic design]]
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