Memory architecture: Difference between revisions

Revision as of 10:48, 9 August 2010

Revision as of 22:05, 11 September 2010

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'''Memory architecture''' describes the methods used to implement electronic computer data storage in a manner that is a combination of the fastest, most reliable, most durable, and least expensive way to store and retrieve information. Depending on the specific application, a compromise of one of these requirements may be necessary in order to improve another requirement.

For example, [[dynamic memory]] is commonly used for [[primary data storage]] due to its fast access speed. However dynamic memory must be repeatedly [[memory refresh | refreshed]] with a surge of current millions of time per second, or the stored data will decay and be lost. [[Flash memory]] allows for long-term storage over a period of years, but it is much slower than dynamic memory, and the static memory storage cells wear out with frequent use.

Similarly, the [[data bus]] is often designed to suit specific needs such as serial or parallel data access, and the memory may be designed to provide for [[parity error]] detection or even [[ECC memory|error correction]] in expensive business systems.

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*[[Von Neumann architecture]]

*[[X86 memory segmentation]]

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