Logic simulation: Difference between revisions

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Summary: Functional simulation redirects here, so it should have a section heading.
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Considering both the advantages and disadvantages of logic simulation, it really is quite a good tool for verifying the correctness of a hardware design. Despite its drawbacks, simulation remains the first choice for proving correctness of a design before fabrication, and its value has been well established.
<ref> Electronic Design Automation For Integrated Circuits Handbook, by Lavagno, Martin, and Scheffer, ISBN 0-8493-3096-3, a survey of the field of EDA. The above summary was derived, with permission, from Volume I, Chapter 16, Digital Simulation, by John Sanguinetti. </ref>
 
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== Functional simulation ==
For functional simulation of program source code, see [[Emulator#Functional_simulators|Emulator]].
 
== See also==