System bus model: Difference between revisions

Revision as of 09:05, 28 May 2011

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{{merge to|System bus|discuss=Talk:System bus model#Merge to System bus|date=May 2011}}

[[Image:Computer system bus.svg|thumb|right|400px]]

The '''system bus model''' is a streamlined version of the [[Von Neumann architecture|von Neumann model]] of computer architecture.<ref>{{cite book |title=The essentials of computer organization and architecture |author1=Linda Null |author2=Julia Lobur |publisher=Jones & Bartlett Learning |year=2006 |isbn=9780763737696 |edition=2}}</ref> Its main feature is that it interconnects the processor, memory, and I/O subsystems (the three individual subunits which the model divides the computer into) by a single [[bus (computing)|bus]], dividedthe insystem 3bus; which is comprised of three buses dedicated to a particular componentsfunction: the [[data bus]], [[address bus]], and [[control bus]].<ref name="POCA"/> The system bus model deviates from the von Neumann model by combining the [[arithmetic logic unit]] (ALU) and the [[central processing unit]] (CPU) into a single unit.<ref name="POCA">{{cite book|first=Miles J.|last=Murdocca| coauthors=Vincent P. Heuring|year=2000|title=Principles of Computer Architecture|publisher=Prentice-Hall|id=ISBN 0-201-43664-7|pages=5}}</ref>

The system bus is composed of the [[data bus]], [[address bus]], and [[control bus]].<ref name="POCA"/> The data bus is used for transfer of data between subunits while the address bus is used to transmit information to determine where the data should be sent.<ref name="POCA"/> The control bus is used to provide information as to how data is being sent.<ref name="POCA"/>

==References==