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[[Synchronization]]
In [[Synchronization]] applications holdover can be defined as:<ref>http://www.etsi.org/deliver/etsi_i_ets/300400_300499/30046201/01_60/ets_30046201e01p.pdf</ref>
<blockquote> An operating condition of a clock which has lost its controlling input and is using stored
data, acquired while in locked operation, to control its output. The stored data are used to control phase
and frequency variations, allowing the locked condition to be reproduced within specifications. Holdover
begins when the clock output no longer reflects the influence of a connected external reference, or
transition from it. Holdover terminates when the output of the clock reverts to locked mode condition.</blockquote>
Clock Accuracy in MIL-PRF-55310<ref>http://standards.gsfc.nasa.gov/reviews/mil/mil-prf-55310d/mil-prf-55310d.pdf</ref>
Time Error Model in ITU G.810<ref>http://www.itu.int/rec/T-REC-G.810-199608-I</ref>
Definition of a Disciplined Oscillator<ref>http://tf.nist.gov/general/enc-d.htm</ref>
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