Flow to HDL: Difference between revisions

Revision as of 01:04, 25 February 2011

Revision as of 00:19, 14 January 2012

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'''Flow to HDL''' tools and methods convert flow-based system design into a [[hardware description language]] (HDL) such as [[VHDL]] or [[Verilog]]. Typically this is a method of creating designs for [[field-programmable gate array]], [[application-specific integrated circuit]] prototyping and [[DSP]]{{Clarify(Digital me|date=FebruarySignal 2009}}Processing) design. Flow-based system design is well-suited to field-programmable gate array design as it is easier to specify the innate parallelism of the architecture.

== History==