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m Robot - Moving category Glossary of computers to Category:Glossaries of computers per CFD at Wikipedia:Categories for discussion/Log/2012 February 25. |
m Typo fixing, replaced: A.k.a → A.k.a. (5) using AWB |
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| '''Common Memory'''
| A.k.a. Shared Memory. Should refer to memory on a multi-FPGA board to which all the FPGAs can communicate data to DIRECTLY and is external to the FPGA.
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| '''Compile/[[Compilation (programming)|Compilation]]'''
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| '''[[emulator|Emulation]]/[[Simulation]]'''
| A.k.a. Simulation, Modeling. Process of mimicking the behavior of an [[ASIC]] design on [[FPGA]]-based hardware or a processor-based system or (in the case of simulation) a computer.
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| '''[[Flowware]]'''
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| '''[[High Performance Computing]] (HPC)'''
| A.k.a. High Performance Embedded Computing, Parallel Computing. Parallel computing based on an array of microprocessors or (Reconfigurable [[High-performance computing|HPC]]): [[FPGA]]s or [[Reconfigurable Data Path Array|rDPA]]s characterized by large run-times and computing resources, parallel implementations of algorithms.
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| '''Hybrid'''
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| '''Local Memory'''
| A.k.a. DRAM, SRAM, QDR, DDR SRAMs, ZBT RAM. This term should be used purely to describe memory that is external to an [[FPGA]] or [[Reconfigurable Data Path Array|rDPA]], is attached directly to an FPGA, and is not attached to any other FPGA or device on the board or outside of it. It should be called "On-chip memory" when located on board of the same chip with the [[FPGA]] or [[Reconfigurable Data Path Array|rDPA]].
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| '''[[Morphware]]'''
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| '''On-chip memory'''
| A.k.a. Block RAM, Cache. This term should refer to memory that is available on-chip within a single chip (whether it be BlkRAM Slices or SRAM slices). The term cache should be reserved purely for memory directly attached to processors on the system/host side.
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| '''Place and Route'''
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