Flow to HDL: Difference between revisions

Revision as of 00:19, 14 January 2012

Revision as of 12:02, 16 May 2012

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{{unref|date=May 2012}}

'''Flow to HDL''' tools and methods convert flow-based system design into a [[hardware description language]] (HDL) such as [[VHDL]] or [[Verilog]]. Typically this is a method of creating designs for [[field-programmable gate array]], [[application-specific integrated circuit]] prototyping and [[DSPdigital signal processing]](Digital Signal Processing(DSP) design. Flow-based system design is well-suited{{says who|date=May 2012}} to field-programmable gate array design as it is easier to specify the innate parallelism of the architecture.

== History==

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* [[Embedded C++]]

* [[Field Programmable Gate Array]] (FPGA)

* [[Hardware description language]] (HDL)

* [[HDL]]

* [[Handel-C]]

* [[Icarus Verilog]]