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Convex was formed in 1982 by Bob Paluck and [[Steve Wallach]] in [[Richardson, Texas]]. It was originally named '''Parsec''' and early prototype and production boards bear that name. They planned on producing a machine very similar in architecture to the [[Cray Research]] [[vector processor]] machines, with a somewhat lower performance, but with a much better [[price/performance ratio]]. In order to lower costs, the Convex designs were not as technologically aggressive as Cray's, and were based on more mainstream chip technology, attempting to make up for the loss in performance in other ways.
Their first machine was the '''C1''', released in 1985. The C1 was very similar to the [[Cray-1]] in general design, but its CPU and main memory was implemented with slower but less expensive CMOS technology. They offset this by increasing the capabilities of the vector units, including doubling the vector registers' length to 128 64-bit elements each.<ref>{{cite web | author = David A. Patterson | title = Lecture 6: Vector Processing | url = http://www.eecs.berkeley.edu/~pattrsn/252F96/Lecture06.pdf | accessdate = 2011-04-29 | format=PDF | authorlink = David Patterson (scientist)}}</ref> It also used [[virtual memory]] as opposed to the static memory system of the Cray machines, which improved programming. It was generally rated at 20 MFLOPS peak for double precision (64-bit), and 40 MFLOPS peak for single precision (32-bit), about one fifth the normal speed of the Cray-1. They also invested heavily in advanced automatic vectorizing [[compiler]]s in order to gain performance when existing programs were ported to their systems. The machines ran a [[BSD]] version of [[Unix]] known initially as '''Convex Unix''' then later as '''ConvexOS''' due to trademark and licensing issues. ConvexOS has DEC [[VAX/VMS|VMS]] compatibility features as well as Cray Fortran features. Their Fortran compiler went on to be licensed to other computers such as [[Ardent Computer]] and Stellar (and merged Stardent).
The '''C2''' was a crossbar-interconnected [[multiprocessor]] version of the C1, with up to four CPUs, released in 1988. It used newer 20,000-gate CMOS and 10,000-gate [[emitter-coupled logic]] (ECL) gate arrays for a boost in clock speed from 10 MHz to 25 MHz, and rated at 50 MFLOPS peak for double precision per CPU (100 MFLOPS peak for single precision). It was Convex's most successful product.
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