Picture Processing Unit: Difference between revisions

Revision as of 13:57, 4 July 2013

Revision as of 10:29, 24 July 2013

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The '''PPU (Picture Processing Unit)''', more specifically known as [[Ricoh]] RP2C02 ([[NTSC]] version) / RP2C07 ([[PAL]] version), is the [[microprocessor]] in the [[Nintendo Entertainment System]] responsible for generating video signals from graphic data stored in memory.

The chip is known for its effective use of [[Memory (computers)|memory]], using very little memory to store graphical data. It was rather advanced for its time when the [[Nintendo Entertainment System|Famicom]] (Japanese version of the Nintendo Entertainment System) was released, sporting full [[Sprite (computer graphics)|sprite]] support, movable backgrounds, and many colors on screen at the same time. To compete with other video game systems, like the graphically superior [[Sega Master System]], [[Nintendo]] also extended the PPU's technical capabilities through the use of [[Multi-Memory Controller|mappers]], which were placed on the game cartridge. The mappers added more memory or could bank switch data into the PPU's [[address space]], making it possible to create more advanced graphics, using more colors and bigger [[tile set]]s.

== Key features ==

* 2 kB of external [[Random-access memory|RAM]] to store tile layout and auxiliary color information for background graphics (commonly referred to as ''nametables'')

* 256 bytes of internal [[Dynamic random-access memory|DRAM]] for [[Sprite (computer graphics)|sprite]] attribute storage. This is measured in the amount of [[Address space|address space]] consumed; not every bit of every byte exists in the PPU.

* 32 bytes of internal [[Static random-access memory|SRAM]] for palette storage. As for sprite attribute storage, not all bits exist in the PPU.

* 8 × 8 or 8 × 16 (selectable) sized [[Sprite (computer graphics)|sprite]]s

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== Technical information ==

The PPU is controlled via eight [[Processor register|registers]] visible in the [[Central processing unit|CPU]]'s address space in the addresses $2000 through $2007. All data and information is passed to the PPU through these, except the raw tile data (there are exceptions, as some games had RAM instead of ROM to store the tile data, and the tiles had to be written each time), which is hardwired to the PPU's address space. The PPU uses the tile graphics data together with information stored by the program in the PPU's RAM, such as color and position, to render the final graphical output to the screen.

The lowest graphical components the PPU operates with are [[tile]]s, which are blocks of 8×8 or 8×16 pixels. The tiles are stored in a [[Read-only memory|ROM]] chip on the game cartridge. They are the basic building blocks, used to create larger moving objects, or large static backgrounds.