Logic simulation: Difference between revisions

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{{Redirect|Functional simulation|the simulation of program functionality|High-level emulation}}
 
'''Logic simulation''' is the use of [[Computer simulation|simulation software]] to predict the behavior of [[digital circuit]]s and [[hardware description language]]s. Simulation can be performed at varying degrees of [[Abstraction (computer science)|physical abstraction]], such as at the [[SPICE|transistor level]], [[digital circuit|gate level]], [[register -transfer level]] (RTL), [[electronic system-level design and verification|electronic system-level]] (ESL), or behavioral level.
 
==Use in verification and validation==