Simple programmable logic device: Difference between revisions

Revision as of 20:44, 17 September 2013

Revision as of 21:14, 15 October 2013

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{{merge to|Programmable logic device|discuss=Talk:Programmable logic device#Proposed merge with Simple programmable logic device|date=September 2013}}

A '''simple programmable logic device''' ('''SPLD)''') is a [[programmable logic device]] with complexity below that of a [[complex programmable logic device|complex programmable logic device (CPLD)]].

The term commonly refers to devices such as [[read-only memory|ROM]]s, [[programmable array logic|PAL]]s, [[programmable logic array|PLA]]s and [[generic array logic|GAL]]s.