Revision as of 13:28, 23 November 2013 edit SiavooshPayandehAzad (talk \| contribs) 60 edits →Delay faults ← Previous edit		Revision as of 14:48, 23 November 2013 edit undo SiavooshPayandehAzad (talk \| contribs) 60 edits →Delay faults Next edit →
Line 32: ==== Delay faults ==== Delay faults can be calassified as: * Gate delay fault * Transition fault * Path delay fault: This fault is due to the sum of all gate propagation delays along a single path. one major problem is the number of possible paths in a circuit under test (CUT), which in the worst case can grow exponentially with the number of lines ''n'' in the circuit. * Path delay fault == Combinational ATPG ==

Automatic test pattern generation: Difference between revisions