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Guy Harris (talk | contribs) →Mechanism: Missing "and". |
Guy Harris (talk | contribs) A more generic description, from Shoulder tap (software); there are other reasons for IPIs than cache coherency (which generally means TLB coherency). |
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{{mergefrom|Shoulder tap (software)|date=December 2013}}
{{Unreferenced|date=December 2009}}
An '''inter-processor interrupt''' ('''IPI''') is a special type of [[interrupt]] by which one processor may interrupt another processor in a [[multiprocessor]] system
== Mechanism ==
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