Inter-processor interrupt: Difference between revisions

Content deleted Content added
A more generic description, from Shoulder tap (software); there are other reasons for IPIs than cache coherency (which generally means TLB coherency).
Merge done.
Line 1:
{{mergefrom|Shoulder tap (software)|date=December 2013}}
{{Unreferenced|date=December 2009}}
An '''inter-processor interrupt''' ('''IPI''') is a special type of [[interrupt]] by which one processor may interrupt another processor in a [[multiprocessor]] system when the first processor requires action from the other processor.