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Not all CISCs are microcoded or have "complex" instructions (compared to a Z80, the MIPS's 32-bit divide or any RISC floating-point instructions are extremely complex) and it's not the number of instructions nor the complexity of the implementation or of the instructions themselves that distinguish a CISC from a RISC, but the addressing modes and memory access. CISC is a catch-all term meaning anything that's not a load-store (RISC) architecture. A PDP-10, a PDP-8, an Intel 386, an Intel 4004, a Motorola 68000, a System z mainframe, a Burroughs B5000, a VAX, a Zilog Z80000, and a 6502 all vary wildly in the number, sizes, and formats of instructions, the number, types, and sizes of registers, and the available data types. Some have hardware support for operations like scanning for a substring, arbitrary-precision BCD arithmetic, or computing an arctangent, while others have only 8-bit addition and subtraction. But they are all CISC because they have "load-operate" instructions that read from memory and perform a calculation at the same time. The PDP-8, having only 8 fixed-length instructions and no microcode at all, is a CISC because of ''how'' the instructions work (for example, fetching from memory and computing an addition at once), but PowerPC, which has over 230 instructions (more than some VAXes) and complex internals like register renaming and a reorder buffer is a RISC. This [http://www.cs.uiowa.edu/~jones/arch/cisc/ Minimal CISC] has 8 instructions, but is clearly a CISC because it combines memory access and computation in the same instructions. [[Special:Contributions/76.205.121.173|76.205.121.173]] ([[User talk:76.205.121.173|talk]]) 08:51, 30 May 2011 (UTC)
: I agree fully, but read the "definition" in the intro (last major edit by myself). I cannot see that it contradicts your points in any way really. However, I find your text well put, almost fit for inclusion in the article already as it stands here. [[Special:Contributions/83.255.33.7|83.255.33.7]] ([[User talk:83.255.33.7|talk]]) 00:04, 3 June 2011 (UTC)
Most of the discussion on this page is about historical machines, but shouldn't there be something about how CISC was succeeded by RISC because of the emphasis on pipelining for efficiency, the failure of compiler writers to generate machine code that actually utilized the more complicated CISC instruction, and that the CISC architectures violated Amdahl's law in terms of the biggest bang for the buck?
== instructions or operations? ==
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