Multiple instruction, multiple data: Difference between revisions

Revision as of 12:00, 9 March 2014

Revision as of 15:48, 2 April 2014

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MIMD machines with shared memory have processors which share a common, central memory. In the simplest form, all processors are attached to a bus which connects them to memory.

Means that every machines with shared memory share a specific CM.

common bus system for all the clients.

for example we considered a bus with clients A,B,C on one side ans P,Q,R another side.

any client with communicate with any one with the help of the bus interface between them.

=== Hierarchical ===