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'''''ARM System–on–Chip Architecture''''' is a book detailing the [[ARM architecture]], as a specific implementation of [[reduced instruction set computing]].<ref name="ieee review">{{cite journal | url=http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=00885658 | title=ARM System-On-Chip Architecture, 2nd Edition | volume=14 | number = 6 | page=4 | work=IEEE Network | publisher=[[IEEE]] | date=
The book's content covers the architecture, [[assembly language]] programming, support mechanisms for [[high-level programming language]]s, the [[instruction set]] and the building of [[operating system]]s. The [[ARM architecture#Thumb|Thumb]] instruction set is also covered in detail.<ref name="manuni">{{cite web|url=http://apt.cs.man.ac.uk/publications/books/ARMsysArch/ | title=ARM System-on-Chip Architecture| publisher= [[University of Manchester]] | deadurl=no | archiveurl=https://web.archive.org/web/20120913015742/http://apt.cs.man.ac.uk/publications/books/ARMsysArch/ | archivedate=13 September 2012 | accessdate=10 January 2014}}</ref>
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