Tomasulo's algorithm: Difference between revisions

Revision as of 04:41, 16 April 2014

Revision as of 04:44, 16 April 2014

Line 8:

The following are the concepts necessary to the implementation of Tomasulo's Algorithm.

*Instructions are issued sequentially so that the effects of a sequence of instructions such as [[exception (computing)|exception]]s raised by these instructions occur in the same order as they would on an in-order processor, regardless of the fact that they are being executed out-of-order (i.e. non-sequentially). Practically speaking, there may indeed be exceptions for which not enough atatusstatus information about the exception is available, in which case the processor will raise a special exception, an "imprecise" exception. "Imprecise" exceptions cannot occur in non-OOE implementations.

*All general-purpose and [[reservation station]] registers hold either real or virtual values. If a real value is unavailable to a destination register during the issue stage, a virtual value is initially used. The functional unit that is computing the real value is assigned as the virtual value. The virtual register values are converted to real values as soon as the designated [[functional unit]] completes its computation.