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This address decoder has four address inputs and sixteen (i.e., 2<sup>4</sup>) device selector outputs. An address decoder is also referred to as a "[[demultiplexer]]" or "demux", although these terms are more general and can refer to devices other than address decoders. The 74154 mentioned above can be called a "4-to-16 demux".
Address decoders are fundamental building blocks for systems that use [[Bus (computing)|buses]]. They are represented in all integrated circuit families and processes and in all standard [[FPGA]] and [[Application-specific integrated circuit|ASIC]] libraries. They are discussed in introductory textbooks in digital logic design.<ref name="TAoE"/>
==References==
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