Content deleted Content added
→See also: We don't put refs in see also |
|||
Line 29:
* [[Logic synthesis]]
* [[Logisim]]
* [[Digital-Logic-Design]]
* [[List of Verilog simulators]]
* [[Functional verification]]
|
→See also: We don't put refs in see also |
|||
Line 29:
* [[Logic synthesis]]
* [[Logisim]]
* [[Digital-Logic-Design]]
* [[List of Verilog simulators]]
* [[Functional verification]]
|