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→See also: That just turned it into a redlink, which doesn't belong in see also |
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* [[Logic synthesis]]
* [[Logisim]]
* [[List of Verilog simulators]]
* [[Functional verification]]
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→See also: That just turned it into a redlink, which doesn't belong in see also |
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Line 29:
* [[Logic synthesis]]
* [[Logisim]]
* [[List of Verilog simulators]]
* [[Functional verification]]
|