Pass transistor logic: Difference between revisions

Revision as of 14:45, 13 October 2014

Revision as of 08:35, 28 November 2014

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''Complementary pass-transistor logic'' or "Differential pass transistor logic" refers to a [[logic families|logic family]] which is designed for certain advantages. It is common to use this logic family for [[Multiplexer#Digital multiplexers|multiplexers]] and [[Latch (electronics)|latches]].

CPL uses series transistors to select between possible inverted output values of the logic, the output of which drives an [[Inverter (logic gate)|inverter]] to generate the non-inverted output signal. Inverted and non-inverted inputs are needed to drive the gates of the pass transistor. The CMOS transmission gates consist of nMOS and pMOS transistor connected in parallel.

==Double pass transistor logic==