Amiga Advanced Graphics Architecture: Difference between revisions

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== Technical details ==
In order to increase memory bandwidth, the [[Chip RAM]] data bus was extended to 32-bit width (as in the [[Amiga 3000|A3000]] (unlike AGA, the A3000's Chip RAM is 32-bit for CPU access only) and the Alice chip (replacing [[Original Chip Set|OCS]]/[[Amiga Enhanced Chip Set|ECS]] [[MOS Technology Agnus|Agnus]]) was improved to be able to support full width access for bitplane DMA. Additionally, the memory clock was doubled.
 
Lisa (replacing former [[Original Chip Set#Denise|Denise]]) adds support for 8-bit bitplane data fetches, 256 instances of 24-bit palette registers, and for 32-bit data transfer for bitplane graphic and [[Sprite (computer graphics)|sprites]].
 
The rest of the chipset remains unchanged, as diddo the Blitter and Copper coprocessors in Alice, still working on 16-bit data.
 
== See also ==