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==Basic principles of
The pass transistor is driven by a periodic clock signal and acts as an access switch to either charge up or charge down the parasitic capacitance C<sub>''x''</sub>, depending on the input signal V<sub>''in''</sub>. Thus, the two possible operations when the clock signal is active (CK = 1) are the logic "1" transfer (charging up the capacitance C<sub>''x''</sub> to a logic-high level) and the logic "0" transfer (charging down the capacitance C<sub>''x''</sub> to a logic-low level). In either case, the output of the depletion load nMOS inverter obviously assumes a logic-low or a logic-high level, depending upon the voltage V<sub>''x''</sub>.
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