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'''Property Specification Language''' ('''PSL''') is a language developed by [[Accellera]] for specifying [[Property (philosophy)|properties]] or [[assertion (computing)|assertions]] about hardware designs. The properties can then be [[functional verification|functionally verified]] via [[logic simulation]] or [[formal verification]]. Since September 2004 the [[standardization|standard]]ization on the language has been done in [[IEEE]] 1850 working group. In September 2005, the IEEE 1850 Standard for Property Specification Language (PSL) was announced.
PSL is a temporal logic extending [[Linear temporal logic|LTL]] with a range of operators for both ease of expression and enhancement of expressive power. PSL makes an extensive use of [[regular expressions]] and syntactic sugaring. It is widely used in the hardware design and verification industry, where [[formal verification]] tools (such as [[model checking]]) are used to prove or refute that a given PSL formula holds on a given design.
==== Examples ====
PSL can express that if some scenario happens now, then another scenario should happen some time later. For instance, the property "a {{color|orange|request}} should always eventually be {{color|orange|grant}} ed can be expressed by the PSL formula:
<source> always (request -> eventually! grant)
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===Operators===
PSL's temporal operators can be roughly classified into LTL-style operators and regular-expression-style operators. Many PSL operators come
==== LTL-style Operators====
Below is a sample of some LTL-style operators of PSL
Here {{color|orange|p}} and {{color|orange|q}} are any PSL formulas.
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