Interrupt vector table: Difference between revisions

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Clarified interrupt vector in introduction, as requested by the clarify flag. Did not remove the clarify flag yet, waiting for somebody else to confirm
m Decapitalized common nouns, stylistic change
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{{about|the general concept|its implementation found in x86 processors|Interrupt descriptor table}}
 
An '''interrupt vector table''' (IVT) is a [[data structure]] that associates a list of [[interrupt handler]]s with a list of [[interrupt request]]s in a table of [[interrupt vector]]s{{clarify|date=November 2015}}. An interrupt vector is the address of the interrupt handler. While the concept is common across processor architectures, each IVT may be implemented in an architecture-specific fashion. For example, a [[dispatch table]] is one method of implementing an interrupt vector table.
 
==Background==
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</ref> Atmel,<ref>[http://www.nongnu.org/avr-libc/user-manual/group__avr__interrupts.html "AVR Libc User Manual"] section: Introduction to avr-libc's interrupt handling</ref> Freescale, AMD, Intel, etc.
 
==Interrupt Handlershandlers==
 
{{main|Interrupt handler}}
 
===Handling Methodsmethods===
 
An interrupt vector table is used in the three most popular methods of finding the starting address of the interrupt service routine:
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===="Predefined"====
 
The "predefined" method loads the [[program counter]] (PC) directly with the address of some entry inside the interrupt vector table. The [[jump table]] itself contains executable code. While in principle an extremely short interrupt handler could be stored entirely inside the interrupt vector table, in practice the code at each and every entry is "JMP address" where the address is the address of the interrupt service routine (ISR) for that interrupt. The Atmel AVR<ref>Roger L. Traylor. [http://web.engr.oregonstate.edu/~traylor/ece473/lectures/interrupts.pdf "Interrupts: AVR interrupt servicing"]</ref><ref> Gary Hill. [http://www.csulb.edu/~hill/ee346/Lectures/10_ATmega328P%20Interrupts.pdf "Atmel AVR Interrupt and Timing Subsystems: ATMEGA328P interrupt vector table"]</ref> and all 8051 and Microchip microcontrollers<ref name="huang">{{cite book |last=Huang |first=Han-Wat |title=Pic Microcontroller: An Introduction to Software and Hardware Interfacing |url=http://books.google.com/books?id=CB9GaAU1dwsC&pg=PA247 |accessdate=22 April 2013 |year=2005 |publisher=Cengage Learning |isbn=978-1-4018-3967-3 |page=247}}</ref> use the predefined approach.
use the predefined approach.
 
===="Fetch"====
 
The "fetch" method loads the PC indirectly, using the address of some entry inside the interrupt vector table to pull an address out of that table, and then loading the PC with that address.<ref name="huang" /> Each and every entry of the IVT is the address of an interrupt service routine. All Motorola/Freescale microcontrollers use the fetch method.<ref name="huang" />
Each and every entry of the IVT is the address of an interrupt service routine.
All Motorola/Freescale microcontrollers use the fetch method.<ref name="huang" />
 
===="Interrupt Acknowledgeacknowledge"====
 
The "interrupt acknowledge" method, the external device gives the CPU an interrupt handler number. The interrupt acknowledge method is used by the Intel Pentium and many older microprocessors.<ref name="huang" />
The interrupt acknowledge method is used by the Intel Pentium and many older microprocessors.<ref name="huang" />
 
When the CPU is interruptedaffected by an [[interrupt]], it looks up the [[interrupt handler]] in the interrupt vector table, and transfers control to it.
 
== See also ==