Interrupt vector table: Difference between revisions

Revision as of 17:47, 27 May 2016

Revision as of 17:49, 27 May 2016

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{{about|the general concept|its implementation found in x86 processors|Interrupt descriptor table}}

An '''interrupt vector table''' (IVT) is a [[data structure]] that associates a list of [[interrupt handler]]s with a list of [[interrupt requestsrequest]]s in a table of [[interrupt vector]]s{{clarify|date=November 2015}}vectors. An interrupt vector is the address of the interrupt handler. While the concept is common across processor architectures, each IVT may be implemented in an architecture-specific fashion. For example, a [[dispatch table]] is one method of implementing an interrupt vector table.

==Background==