Multiple instruction, multiple data: Difference between revisions

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=== Hierarchical ===
MIMD machines with hierarchical shared memory use a hierarchy of buses (as, for example, in a "[[Fat tree]]") to give processors access to each other's memory. Processors on different boards may communicate through inter-nodal buses. Buses support communication between boards. With this type of architecture, the machine may support over anine thousand processors.
 
== Distributed memory ==